Calibre RVE Interface
The RVE plug-in works with Mentor's Calibre RVE. RVE is used to nagivate through the error files produced by design rule checks (DRC). RVE supports error files generated by Mentor's Calibre, Synopsys Hercules, Cadence's Assura and other tools used by chip engineers to verify that there are no violations in the design rules of the chip layout.
To see a particular DRC violation on the layout, you need a GDSII viewer that can load the GDSII file and accept commands from RVE. This plug-in interfaces to RVE.
The verification tools output an error file. To actually view the errors, Qckvu loads the GDSII stream file and Calibre RVE instructs Qckvu where to find the error.