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Revision History

This page summarizes the changes, enhancements and fixes to the AWRout program.

AWROut 1.53 04/18/2017

New Release for SPB 17.2

The release of SPB 17.2 required a rebuild of AWROut. There are now two versions of AWROUT - one for SPB 16.6 and one for SPB 17.2.

For users that have both 16.6 and 17.2 installed on the same machine, some additional code in the startup file must be added in order to detect the version and load the appropriate version of AWROut.

Details




AWROut 1.49 05/26/2016

Software Updates

Added support for circular shapes defined by a single arc segment.

Changed the board outline algorithm to treat multiple shapes as holes since voids are not permitted on the board outline subclass.

Added support for the 3Di BOUNDARIES section, used to define dielectric board outline and holes. This section is used by 3Di2STEP when generating negative dielectric.

Modified the clipping functionality to output polygons without cutlines.




AWROut 1.46 02/19/2016

Drill issue

Some structures in the Allegro database were via-like (spanned multiple layers with a drill) but were in fact pins (single layer). This was causing incomplete drill data to be written to the 3Di file on the dielectric layers. This version checks for drill dielectrics even for pin objects.




AWROut 1.43 11/14/2014

Windows - Color Table

Fixed a layer color assignment problem when the pcbenv file included a path to Allegro's color table. Previous version was not using the path and expected the color table in fixed location.

Linux Version Addded

Ported AWROut to Linux. Does not include 3DVU on Linux.




AWROut 1.42 09/1/2014

Various Updates
Fixed a bug where components would still be separated by layer even if the option to export outlines was switched off.

Changed the layer terminology from DIELECTRIC_(N) to VIA(N) and DIELECTRIC_BOARD_(N) to BOARD(N).

Improved the color representation of dielectric boards and vias.

Lifted the restriction on maximum arc resolution and set the default to 32.




AWROut 1.36 04/11/2013

This version fixes the multi-width trace problem.




AWROut 1.35 08/06/2012

Added an option in the AWROut dialog to control whether or not dielectric board outlines should be rendered.




AWROut 1.34 04/23/2012

Fixed a bug associated with clipping and sizing.




AWROut v1.33 02/02/2012

ORCAD PCB Pro Compatible

Orcad PCB Pro is based on Allegro but has SKILL development disabled. The AWROut was modified so that it can execute in this environment.




AWROut v1.32 12/07/2011

Component Pins Not Extracted

Fixed a bug where all pins from a component were not extracted if they belonged to an unassigned net.

Vertex Filter GUI

Modified the GUI labeling of the vertex filtering option to make it clearer.

Component Outlines

Improved component outline extraction by first looking on layer PACKAGE GEOMETRY/PLACE_BOUND_TOP or PACKAGE GEOMETRY/PLACE_BOUND_BOTTOM for the component outline. If no suitable outline is found then the bounding box of all the component's pins is used.

Round Pin

Added support for circular pins defined with two concurrent points.



AWROut v1.30 04/23/2011

Fixed Dropped Geometries

In certain cases geometries of the selected nets were dropped when sizing was used. This has been fixed.


AWROut v1.29 11/07/2010

Added Log file

Added log file to help debug installation problems.


AWROut v1.27 05/20/2010

Speed Improvement

Significantly improved the speed of AWROut, especially on larger files. The run time for a 20MB test file was reduced from 56 minutes to 150 seconds.

Progress message

Improved the progress messages and status to make clearer to the user what is happening.

Duplicate data

Fixed a bug which was adding duplicate data to the 3Di file under some circumstances when using sizing with multiple nets.


AWROut v1.26 05/08/2010

Mirror components

Fixed a bug where custom-shaped pins on mirrored components were not being correctly mirrored.

Via stackup

Added support for preserving entire via stackups when only some portion of the via was being clipped. This should now preserve via integrity in the data.

'Add All' button

Removed the 'Add All' button for net filtering to avoid confusion with the purpose of filtering nets for partial analysis.

'dummy' net

Removed the 'dummy' net from the list of available nets. AWROut now issues a warning if there are no nets present in the design.

Vertex filtering

Added an option to turn vertex filtering on or off. The default was always on which was leading to some slight changes in trace direction in some cases where the traces were badly defined. The default is now off.


AWROut v1.24 02/08/2010

Unwanted Vias Removed

Fixed a bug that produced vias between all conductor layers even if the pad stack was defined as buried or blind.

Unplaced Components

Fixed a bug that caused a crash if unplaced components were present in the database.


AWROut v1.23 01/26/2010

Oblong Pad Incorrectly Rendered

Fixed a bug that rendered an oblong pad incorrectly.


AWROut v1.22 01/21/2010

Proximity Net Dropping Elements

When net sizing was selected, previous versions of this program might have dropped some entities of the "proximity net" that should not have been dropped. This has been fixed.

AWROut v1.20 10/15/09

Improved Control of Solder Bumps and Balls

This version allows the user to specify solder bumps for a flip chip and solder balls for the package independently. It also allows the user to assign a height to the solder ball or bump, in addition to the diameter, essentially modeling it as a barrel instead of a sphere. [requested by Qualcomm]

AWROut v1.19 10/15/09

Control for Package Pins

A new control has been added when exporting 3Di. In previous versions, if any pin on a component was selected, all pins were extracted in order to give the user a feel for the "context" of the extracted data.

This decision is not optimimum for IC package designs and can now be controlled via check box in the settings dialog.


AWROut v1.18 10/13/09

Die Bump Support

For Cadence SIP products, AWROut now reads the die properties and will export solder bumps if they are defined in the die's properties. The 3Di file has been enhanced to add to the solder bump's geometry properties of PADSTACK and COMPONENT in addition to NET and LAYER. [Requested by Qualcomm]


AWROut v1.17 10/09/09

SIP Support

Fixed a couple of problems when running inside of Cadence SIP (cdnsip). Octagonal pads were not supported. Mirrored via geometry's were not supported. Addtional dielectric layers above the top metal layer caused some Z value computation errors.


AWROut v1.16 08/26/09

Added a table entry identifying the version of AWRout and the version of the bool32 used to produce the file. This allows the reader to identify whether the file version is in synch with the 3Di reader and also verifies the source of the 3Di file creator.


AWROut v1.15 08/26/09

Removed Installation Password

In order to make installation easier, the password normally required to start the installer has been removed.


AWROut v1.14 06/19/09

No More DOS Box

suppressed the display of the command prompt window while processing the output.

Command Active Warning

Added a warning to the user if a command is active when running AWROut. Having a command active while attempting to run a function in AWRout could result in either no action or possibly an endless loop.

Filter Warning

Added a warning to the user if no filters are selected; Since most of our users are extracting only a small part of a very large design, accidentally switching off the net filter might results in getting a very large output.

Updated Progress Bar
For large designs, the user might wait a long time before the progress bar first appears and decide that the extractor is hung up. The new progress bar appears earlier and provides more details as to the progress of the extraction.

Component Transformation

For each component instance (or reference) the transformation used to place the component is now listed.


AWROut v1.13 06/03/09

Stackup Table Units

Modified the STACK-UP table so that the units were consistent with the 3Di file and not always in mils.

STACK-UP matches LAYER TABLE

Modified the STACK-UP table (derived from Allegro) so that the names and indices match the LAYER table.

Debug Code Added

Included some debug code to aid identifying installation and execution problems in the field.


AWROut v1.12 06/03/09

Fixed a problem where traces were being dropped when they crossed a cut-line in a clipping window.

AWROut v1.11 05/22/09

Trace Width Change

fixed a bug when clipping a trace whose width changed midstream.

Solder Ball Rendering

Set solder ball rendering to OFF by default.




AWROut v1.10 05/08/09

Allegro Support

Earlier versions of AWRout were developed using APD and not Allegro. They have been rebuilt to support either APD or Allegro (some class/subclasses are different) and the installation has been upgraded to support Allegro. Both Allegro 15.7 and Allegro 16.1/16.2 have been tested.




AWROut v1.09 05/06/09

Component Outline Extents Fix

previous versions may not have accurately computed the extents of a component and thus generated a larger than necessary component outline. This has been fixed.

Component Height Definitions

previous versions did not always understand how to correctly compute a component's height when extracting it from Allegro. This has been improved.

Color Fix

Previous versions had difficult interpreting colors assigned in Allegro 16.x. This has been fixed.

Allegro Install Fix

previous versions only updated the apd.ilinit file for loading the AWRout context. This version now looks for and updates/creates allegro.ilinit.

3DVU Enhancement

While not part of AWRout, we have been using 3DVU for visual evaluation and found it had problems displaying complex polygons. A new polygon clipping routine has been introduced into 3DVU 2.06 which breaks complex polys to simpler ones resulting in improved display. This process is invisible to the user.


AWROut v1.08 04/27/09

16.x Release

This version includes a new installer and release for Allegro 16.x.


AWROut v1.06 03/12/09

Windowing

The ability to define a rectangular or polygonal window (including multiple windows) has been added.

Net Based Proximity Extraction

The ability to select a net and a "proximity" distance and to extract all conductors that fall within the footprint generated by selected nets has been added.

Highlight Fix

The selection/filter dialog has been fixed to avoid a lockup when nets were selected/deselected.

Object Filter

The organization of the object filter has been changed to make it consistent with the layer filter and the net filter.

Component Table in 3Di output

A new component section has been added to the 3Di output where all component insertions have been summarized along with pin labels and coordinates.


AWROut v1.05 02/19/09

GUI Change - Object Filter

Added an object filter check box to match the operation of the net and layer filters. Object type selection now only happens if this option is selected. Otherwise, all object types are processed.

GUI Change - Output File Name

Added an option to name the output 3Di file. Previously, the design name with an extension of .3Di was used. This is now the default, but can be changed.

License Fix

Fixed Flexlm based node-locked licnensing.

GUI Change - Removing Nets from Selection

Modified the net deletion behavior during net selection, so that the remaining selected nets remain highlighted.



AWROut v1.04 02/09/09

This version is derived from APD3D and has the following additions and changes to customize it for AWR's requirements:


Licensing

Licensing module has been added. Supports Flexlm based floating and node locked licensing. The node locked licensing is "broken" in this version and will be fixed in the next release.

Removed Extraneous Tab

removed dialog for setting up DRC rules as this was a legacy from APD3D.

Added Component Extraction and Section to 3Di

This version extracts component properties whenever a component is attached to a net that is extracted. Included are reference designator, part number (if present), value (if present) and other attached component properties that can be extracted from the Allegro/APD database.

A new component table is generated in the 3Di file that contains these component properties in one place along with a listing of the pins and pointers from the pins to the net table.

Stackup

Stackup information extracted from Allegro's stackup data is now included enabling AWR to read material type, thickness and electrical properties (assuming the PCB designer has entered such values into Allegro)

Net Selection Gets Components

When a user selects a conductor/net for extraction, the program finds all components attached to this net and extracts them and any pads defined as part of the component.

Known Issues With This Version

  • Once a net has been selected, deselecting the net does not appear to work and efforts to re-highlight the still selected nets does not work and may lock up Allegro. This will be fixed in the next release.

  • there is no way for the user to control where the 3Di file is written. The default behavior is to write it back to the directory where the input .brd/.mcm file was read from. This will be fixed in the next release.

  • windowing by region is not yet implemented. This is a major piece of work and will require some time.







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